The 74HC595 8 bit Shift Register is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard No. 7A.The 74HC595 are 8-stage serial shift registers with a storage register and 3-state outputs. The registers have separate clocks.

The 74HC595 8 Bit Shift Register shifts the Data on the positive-going transitions of the shift register clock input (SHCP).The data in each register is transferred to the storage register on a positive-going transition of the storage register clock input(STCP). If both clocks are connected together, the shift register will always be one clock pulse ahead of the storage register.

The 74HC595 8 Bit Shift register has a serial input (DS) and a serial standard output (Q7S) for cascading. It is also provided with asynchronous reset (active LOW) for all 8 shift register stages. The storage register has 8parallel 3-state bus driver outputs. Data in the storage register appears at the output whenever the output enable input (OE) is LOW.